org.mbari.siam.moos.deployed
Class DpaBoard
java.lang.Object
org.mbari.siam.moos.deployed.DpaBoard
public class DpaBoard
- extends java.lang.Object
This version of DpaBoard was submitted by B. Baugh on 6/27/02
and first integrated on 7/8/02 by K. Headley. Bill changed the way
that ADC is instantiated to fix a problem in which only the last
DPA channel instantiated would have a working ADC. Headley
folded in changes made earlier to SPI (write one byte to sync up)
and changes to initializeDPAChannel (to put the channel into a
specific state).
Major things not yet tested:
- taking a reading from the ADC
- taking all readings from the ADC
- turning each relay on, power cycle, first write is turn it off
- turning each relay off, power cycle, first write is turn it on
- turning each relay of, power cycle, first write is turn it off
- turning each relay on, power cycle, first write is turn it on
- I presume that interactions between relays are not significant
- getting an enabled interrupt
- getting an enabled interrupt and disabling it
- getting a disabled interrupt
- tripping the digital circuit breaker
- tripping the digital circuit breaker and resetting it
- repeatedly trip/reset the digital circuit breaker, deal with short
- various combinations of drive modes (unipolar/bipolar, RS-485, etc.)
- DPA
- Notes: In the listing below, single-bit register fields are only
listed by their values for a '1' in that position. If a '0' in
that position means something other than the simple negation of
a '1', then the meaning of '0' is listed in the same line.
There are only four items that are not single-bit fields: (1) the
command (in all cases), (2) the power-down (or simply 'power') mode for
an ADC Register Write, (3) the channel value for an ADC Register
Write, and (4) the 'count', or number of clicks to move the
potentiometer for a Dpot
(Current Limit) Register Write. There are individual names for
each possible value for the cmnd field and for the ADC power
mode. The ADC Channel and the Dpot Count field are simply
unsigned numbers, so only a mask value is specified for those.
- Defaults: Most of the values do not have meaningful defaults.
Those that do have a '*' or a '!' before the value. An '*'
means that the asterisked value is the default. A '!' means
that a 0 in that bit position is the default.
- Summary of registers
- ADC
- Interrupt
- Relays
- Dpot
- Channel Control
- DPA board-level commands (cmnd mask 0xf000, values:)
- ADC
- Notes: Programmer writes a command to the ADC and waits for
the DPA's status to become not busy, which indicates
that the command has been accepted and the conversion
has been completed. After the DPA status becomes
nonbusy, the programmer can read the ADC. If the power
mode is power on, the command is also a conversion
request; all bits are always meaningful, so every
conversion request must include power mode, acquisition
mode and drive types.
- 0x4000 ADC Write (aka take reading)
- Power Mode (mask 0x00c0, values:)
- 0x0000: full power down [default when not sampling]
- *0x0040: standby
- 0x0080: power on / use internal clock [default when sampling]
- 0x00c0: power on / use external clock
- Acquisition Mode
- !0x0020: External (0 means Internal)
- SGL/DIF (drive type)
- *0x0010: Single-ended (0 means Differential)
- Uni/Bi (drive polarity)
- *0x0008: Unipolar (0 means Bipolar)
- Channels (mask 0x0007, values:)
- 0x0007: Battery Supply Voltage (Vbat = 5.8*Vin)
- 0x0006: Right Channel voltage sense (Vinstr=6*Vin)
- 0x0005: Right Channel trip level sense
- 0x0004: Right Channel current sense
- 0x0003: Heat sink temperature
- 0x0002: Left Channel voltage sense (Vinstr=6*Vin)
- 0x0001: Left Channel trip level sense
- 0x0000: Left Channel current sense
- 0xb000 ADC Read (mask for values: 0x0fff)
- Interrupt Register
- Notes: The DPA is capable of generating an interrupt to the
SideKick processor ONLY on overcurrent conditions. If a
channel has an overcurrent condition (is drawing more
current than allowed by the SetCurrentLimit cmnd), the
electronic circuit breaker will trip. An interrupt will
be asserted iff the electronic circuit breaker for that
channel has tripped (and has not been reset), AND the
interrupt enable for that channel is set, AND the global
interrupt enable has been set. The assertion of an
interrupt will cause three things to be true: the
interrupt flag for that channel will be set, the global
interrupt flag will be set, and the DPA board will
assert an interrupt to the SideKick processor. The
overcurrent condition itself is asserted by the digital
circuit breaker, and that breaker is cleared by turning
it off. (Reading the interrupt register has no effect
on the interrupt flags.)
- Commands
- 0x5000 Write interrupt reg
- 0xc000 Read interrupt reg
- Register bits (mask 0x003f, RO=WriteOnly, RW=Read/Write)
- 0x0020: (RW)Left Channel overcurrent intr en
- 0x0010: (RW)Right Channel overcurrent intr en
- 0x0008: (RW)Global intr en
- 0x0004: (RO)Left Channel overcurrent intr flag
- 0x0002: (RO)Right Channel overcurrent intr flag
- 0x0001: (RO)Global intr flag
- DPA Channel-level commands (cmnd mask 0xf000, values:)
- Relays
- Commands
- 0x2000: Write left channel register
- 0x3000: Write right channel register
- 0xa000: Read left channel register
- 0x9000: Read right channel register
- Register bits
- 0x0004: Connect 485 Terminators
- 0x0002: Isolate communications ground
- 0x0001: Isolate instrument power
- Dpot (Digital Circuit Breaker Current Limit)
- Commands
- 0x0000: Write left channel
- 0x1000: Write right channel
- Register bits and fields
- 0x0100: Save position
- 0x0080: Up (move potentiometer UP)
- 0x007f: mask for counter value (0 through 127)
- Channel Control
- Commands
- 0x6000: Write left channel
- 0x7000: Write right channel
- 0xd000: Read left channel
- 0xe000: Read right channel
- Register bits
- 0x0020: Serial tx power on
- 0x0010: Comm fast (0 means Slew Rate Controlled)
- 0x0008: Comm Mode RS-485 (0 means RS-232)
- 0x0004: Comm Half Duplex (0 means full duplex)
- 0x0002: Comm Power On
- 0x0001: Instrument Power On (this is the Digital Circuit Breaker)
Implementation notes: when a board is created (ctor) it should
instantiate all the left and right components, because it should
initialize them. From there on out, when a user of a channel
manipulates any of its components, including components that are
specialized to the left or right channel, they will do the right
thing, since (a) they have access to the DPA board resources (shared
between the channels) and (b) have their own control when that's
appropriate. Since the operation will be specified in the (abstract)
superclass while the implementation lives in the subclass, the
user can safely call superclass operations and they will either
do the right thing because they are identical for both channels, or
they will do the right thing because the implementation that gets
invoked has been correctly specialized to the correct channel.
Probably the only thing that really needs to handle the left and
right channels as such is the board itself, and it can do so.
E.g., if it needs to initialize the current limit by setting both
channels to zero, it can do { leftChannel.adc.setCurrentLimit(0);
rightChannel.adc.setCurrentLimit(0); }.
|
Constructor Summary |
DpaBoard(int spiSlaveSelectValue)
|
| Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait |
_boardAdc
public DpaBoard.BoardAdc _boardAdc
doDebug
protected boolean doDebug
_spiSlaveSelectValue
protected int _spiSlaveSelectValue
_spi
protected static SpiMaster _spi
_boardInitialized
protected boolean _boardInitialized
DpaBoard
public DpaBoard(int spiSlaveSelectValue)
getLeftChannel
public DpaBoard.DpaChannel getLeftChannel()
getRightChannel
public DpaBoard.DpaChannel getRightChannel()
checkForDpaHardware
public static boolean checkForDpaHardware(int slaveSelectVal)
- Detect DPA hardware. Returns true if the hardware is present.
writeReadSpi
protected int writeReadSpi(int dataOut)
stallOnBusyBit
public void stallOnBusyBit()
Copyright © 2003 MBARI.
The Monterey Bay Aquarium Research Institute (MBARI) provides this documentation and code "as is", with no warranty, express or implied, of its quality or consistency. It is provided without support and without obligation on the part of MBARI to assist in its use, correction, modification, or enhancement.